Abstract
To design data converters main challenges are high resolution, high speed, and low power. Operational amplifiers (op-amps) are core building blocks in such mixed signal systems to overcome these issues. As high resolution is linked to op-amp's high dc gain and high speed demands single pole response and large unity gain frequency. This paper deals with design of two stage opamp with class AB as output stage and it has been simulated in 0.18um TSMC CMOS technology. This design achieves high low frequency gain(92dB), good gain bandwidth product(19.07MHz) and low power. To stabilize this op-amp techniques used are Miller compensation, which has compensation capacitor(C-m) and zero nulling resistor(R-z),in this design R-z has been implemented with PMOS transistor along with transconductance(g(m2)) of second stage, which is set by current is this stage in order to push non dominant pole (f(nd)) to a higher frequency in order to get better gain band width product(GBW) and good phase margin.