A Cost-Effective Dynamic Partial Reconfiguration Implementation Flow for Xilinx FPGA

Ahmed Kamaleldin; Islam Ahmed; Abulfattah M. Obeid; Ahmed Shalash; Yehea Ismail; Hassan Mostafa; IEEE

doi:10.1109/NGCAS.2017.17

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A Cost-Effective Dynamic Partial Reconfiguration Implementation Flow for Xilinx FPGA

Ahmed Kamaleldin, Islam Ahmed, Abulfattah M. Obeid, Ahmed Shalash, Yehea Ismail, Hassan Mostafa and IEEE

2017 New Generation of CAS (NGCAS), pp.281-284

09/2017

DOI: https://doi.org/10.1109/NGCAS.2017.17

Abstract

Algorithm design and analysis

Clustering algorithms

Design Automation

Dynamic Partial Reconfiguration

Field Programmable Gate Array

Field programmable gate arrays

Partitioning algorithms

Routing

Switches

Tools

Reconfigurability of Field Programmable Gate Array (FPGA) makes it one of the most promising approaches in the implementation of reconfigurable systems. Partitioning the reconfigurable system to many Reconfigurable Modules (RMs) and allocating them into Reconfigurable Regions (RRs) on the FPGA is a challenging task for the system designer. Partitioning choices impact the area efficiency and the time of reconfiguration of the reconfigurable systems. In this paper, different partitioning techniques are studied and evaluated according to their impact on reconfiguration time and the area utilization. Also, a new proposed Dynamic Partial Reconfiguration (DPR) tool flow is presented that automates and optimizes the partitioning procedure based on a graph clustering algorithm, modifies the design's HDL files as per the partitioning results, and implements a routing switch to dynamically change routing between Reconfigurable Regions (RRs) during reconfiguration.

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Title: A Cost-Effective Dynamic Partial Reconfiguration Implementation Flow for Xilinx FPGA
Creators - without role: Ahmed Kamaleldin - Cairo University
Islam Ahmed - IC Verification Solutions, Mentor Graphics, Cairo, Egypt
Abulfattah M. Obeid - King Abdulaziz City for Sci. & Technol., Riyadh, Saudi Arabia
Ahmed Shalash - Cairo University
Yehea Ismail - American University in Cairo
Hassan Mostafa - Cairo University
IEEE
Publication Details: 2017 New Generation of CAS (NGCAS), pp.281-284
Publisher: IEEE
Identifiers: 9918888208331
Academic Unit: King Abdulaziz City for Science & Technology
Language: English
Resource Type: Conference proceeding