Abstract
Conference Title: 2018 15th International Multi-Conference on Systems, Signals & Devices (SSD) Conference Start Date: 2018, March 19 Conference End Date: 2018, March 22 Conference Location: Yassmine Hammamet, Tunisia This paper presents a novel platform for reconfigurable architecture design. This platform contains a design that allows modeling and implementation of hardware architecture. We have nominated a generic design flow for partial and dynamic reconfigurable architecture (GDF4PDR). This flow is able to support any type of application. in addition, it is compatible with the Xilinx design flow and does not require the addition of other hardware or software elements. It is based on three elements, the reconfigurable model, the application and the mapping strategy between these elements. The comparison results show that the proposed flow is more generic and characterized by a high abstraction level modelling. The aim is to offer a platform that provides a good instance of architecture that meets compromises reconfigurations/ performance. To validate the proposed platform a video watermarking application has been used. Experimental results show that the proposed design flow provides an architecture with a small reconfiguration time while ensuring optimal hardware implementation in terms of resources.