Abstract
This paper presents a 10-bit power and performance-efficient successive-approximation-register (SAR) analog-to-digital converter (ADC) dedicated to the digitization of analog biomedical signals. For medium resolutions and speed, the proposed ADC achieves low power consumption, high performance, and small area by utilizing an optimization technique. This paper also imposes a high degree of efficiency and simplicity in circuit design procedure. The ADC is designed and optimized based on the proposed algorithm in a 65-nm CMOS process. The circuit including the ADC and reference circuits consumes 0.35 mWat at 300 kS/s and achieves Signal to Noise and Distortion Ratio (SNDR) of 60.14 and figure of merit (FoM) of 10.5 fJ/coversion-step. The core circuit area is 0.0165 mm(2).