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A new programmable ALU architecture for hard-core processor
Conference proceeding

A new programmable ALU architecture for hard-core processor

Hajer Najjar, Riad Bourguiba, Jaouhar Mouine and IEEE
2016 13TH INTERNATIONAL MULTI-CONFERENCE ON SYSTEMS, SIGNALS & DEVICES (SSD), pp.567-570
International Multi-Conference on Systems Signals and Devices
01/01/2016

Abstract

Computer Science Computer Science, Theory & Methods Engineering Engineering, Electrical & Electronic Science & Technology Technology
Hard-core processors are known to be a very performed in terms of operation frequency, area and power consumption. However, they have fixed design so that, they cannot be reused for different applications. In this paper we propose a new ALU (Arithmetic and Logic Unit) architecture that allows to these processors to be generic propose without losing hard-core performances.

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