A parallel hierarchical solver for the integral equation analysis of low frequency devices

F. P. Andriulli; H. Bagci; F. Vipiana; G. Vecchi; E. Michielssen; IEEE

doi:10.1109/EPEP.2007.4387193

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Conference proceeding

A parallel hierarchical solver for the integral equation analysis of low frequency devices

F. P. Andriulli, H. Bagci, F. Vipiana, G. Vecchi, E. Michielssen and IEEE

ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING, pp.325-328

01/01/2007

DOI: https://doi.org/10.1109/EPEP.2007.4387193

Abstract

Engineering

Engineering, Electrical & Electronic

Engineering, Manufacturing

Science & Technology

Technology

A hierarchical marching-on-in-time (MOT)-based scheme to discretize and solve the time domain Electric Field Integral Equation (EFIE) is presented. The scheme is immune to time domain low-frequency breakdown phenomena and gives rise to better conditioned linear systems than the ones obtained using standard Rao-Wilton-Glisson (RWG) and loop-star bases. The proposed method is implemented on a distributed memory cluster and applied to the analysis of transient wave interactions with an 88-port printed circuit board structure and a three-layer stacked inductor.

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Title: A parallel hierarchical solver for the integral equation analysis of low frequency devices
Creators - without role: F. P. Andriulli - University of Michigan–Ann Arbor
H. Bagci - University of Michigan–Ann Arbor
F. Vipiana - Polytechnic University of Turin
G. Vecchi - Polytechnic University of Turin
E. Michielssen - University of Michigan–Ann Arbor
IEEE
Publication Details: ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING, pp.325-328
Publisher: IEEE
Number of pages: 2
Identifiers: 9943505808331
Academic Unit: King Abdullah University of Science & Technology
Language: English
Resource Type: Conference proceeding