Abstract
We demonstrate an amorphous higher-k (k>20) HfTiSiON gate dielectric for sub 32nm node capable of low equivalent oxide thickness (EOT=0.84nm). For the first time, we have addressed the thermodynamic instability of TiO2-containing gate dielectrics achieving an acceptably thin SiOx interface (0.7nm) after 1070 degrees C. 3-10x leakage current reduction is achieved with HfTiSiON vs. HfSiON due to a higher-k TiO2 cap (k=40) on HfSiON. For the first time, an 8% I-on-I-off improvement of HfTiSiON vs. HfSiON is demonstrated. HfTiSiON shows I-on=1300 mu A/mu m at I-off=100nA/mu m for V-dd=1.2V without stress engineering. HfTiSiON shows bias temperature instability (PBTI) and time dependent dielectric breakdown (TDDB) similar to HfSiON. This work is significant because it demonstrates higher-k scaling benefit an,! extension of high-k beyond Hf-oxides for sub-32nm technologies.