Abstract
The design of new computer architectures relies heavily on simulation. New architectures that incorporate unconventional features or novel designs cannot usually use established simulators and, therefore, designers have to develop their own.
Traditionally, software simulators have been the main platform for architectural design, based on the conventional wisdom that software is flexible and easy to program, albeit slow, while hardware is fast but difficult to develop. The introduction of high-level hardware description languages (HDLs), such as Bluespec, together with improvements in FPGAs, provide an opportunity to challenge the traditional notion and consider hardware simulators for this purpose.
This paper presents a comprehensive analysis of the performance and the implementation effort of two simulators, one FPGA based and one software based, developed to simulate a novel, unconventional architecture. The analysis uses the interconnection network of the SpiNNaker massively-parallel computer as a case study which allows a comparison with the real system.