Abstract
Conference Title: 2015 IEEE International Conference on Smart Energy Grid Engineering (SEGE) Conference Start Date: 2015, Aug. 17 Conference End Date: 2015, Aug. 19 Conference Location: Oshawa, ON, Canada Wireless Sensor Networks (WSNs) have been considered one of the very promising technologies for the implementation of smart grid. WSN-based smart grid communication protocols have been focused on extending the node's lifetime which is heavily depends on the energy consumption of the node. Since wireless sensors are typically deployed in an ad hoc fashion and operate off of a limited energy source, e.g., a battery, it is imperative to utilize the most power efficient techniques in wireless sensors to prolong battery life. In WSNs, a central node (a receiver) consumes large amount of power due to the necessity to decode every received packet regardless of the fact that the transmission may suffer from packets collision. Current collision detection mechanisms in WSNs have largely been revolving around direct demodulation and full decoding of received packets. The obvious drawback of full decoding of a received packet is the need to expend a significant amount of energy and processing complexity in order to fully-decode a packet, only to discover the packet is illegible due to a collision. In this paper, we propose a suite of novel, yet simple, smart and power-efficient technique to detect a collision at the receiver side of WSNs without the need for full-decoding of the received packet. Our novel technique aims at detecting collision through fast examination of the signal statistics of a short snippet of the received packet via a relatively small number of computations over a small number of received IQ samples. We also present a complexity and power-saving comparison between our novel technique and a conventional full-decoding technique to demonstrate the significant power and complexity saving advantage of our approach. In addition, we demonstrate how to tune various design parameters in order to allow a system designer multiple degrees of freedom for design trade-offs and optimization.