Abstract
Conference Title: 2017 IEEE Applied Power Electronics Conference and Exposition (APEC) Conference Start Date: 2017, March 26 Conference End Date: 2017, March 30 Conference Location: Tampa, FL, USA The modular multilevel converter (MMC) is a promising topology for both Medium Voltage (MV) and High Voltage Direct Current (HVDC) applications. The MMC employs a large number of “submodule” (SM) cascaded in series per phase arm to achieve the MV- or HVDC voltage. The SM numbers per phase arm can be as high as 256 or 512 SMs for +/− 300kV DC bus voltage for typical 300–600MW Back-to-Back (B2B) and also point to point HVDC applications. The MMC AC side interface voltage Total Harmonics Distortion (THD) requirements are normally < 3% which can be achieved by 48-pulse stepped AC waveform. This paper addresses the first step towards scale-up control and performance analysis such that the behavior of a large number of SMs can be predicted by a cumulative set of a smaller number of SMs. The SM capacitor voltage control is analyzed for scale-up of MMC. Simulation results of B2B HVDC application based MMC system with minimum values of MMC components (SMs capacitors and arms inductors) based on a parametric search are performed using Real Time Digital Simulator (RTDS) system.