Design of DCT_2D toward FPGA

Rostom Kachouri; Mohamed Abid; Chokri Ben Amar

doi:10.1109/ISCCSP.2004.1296511

Back

Conference proceeding

Design of DCT_2D toward FPGA

Rostom Kachouri, Mohamed Abid and Chokri Ben Amar

First IEEE International Symposium on Control, Communications and Signal Processing, ISCCSP’04

21/03/2004

DOI: https://doi.org/10.1109/ISCCSP.2004.1296511

Abstract

Computer Science

Embedded Systems

Hardware Architecture

Image Processing

Long term objective is to conceive a system on chip of the JPEG coding chain. This article presents the VHDL specification, simulation and also synthesis results, of the two-dimensional discrete cosine transform DCT_2D, which constitutes the first block of the JPEG chain. For that, we kept LOEFLER's algorithm which is the best for the DCT implementation, according to a comparison with other architectures. And we targeted the FPGAs as integration technology. Besides, seeing that the DCT is separable as transformation, the two-dimensional discrete cosine transform (DCT_2D) can be formed by two one-dimensional discrete cosine transform (DCT_1D).

Metrics

1 Record Views

Details

Title: Design of DCT_2D toward FPGA
Creators - without role: Rostom Kachouri - Embedded Systems
Mohamed Abid - Embedded Systems
Chokri Ben Amar - Intelligent Machines
Conference: First IEEE International Symposium on Control, Communications and Signal Processing, ISCCSP’04
Identifiers: 9911447108331
Academic Unit: Taif University
Language: English
Resource Type: Conference proceeding