Abstract
Conference Title: 2016 International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT) Conference Start Date: 2016, March 3 Conference End Date: 2016, March 5 Conference Location: Chennai, India This work introduces a novel general design of n-bit analog to digital converter (ADC). It is constructed from one basic ADC cell that generates a digital output bit when an analog voltage is applied at its input and produces an analog voltage. This analog voltage is fed back and sampled to be used again as an input for the same ADC cell in order to produce the next digital output bit. This operation is repeated until the required n-bit digital output is obtained. A sample circuit realization is presented for the n-bit ADC. Simulation results show that it produces clean digital output when simulated at 5Ksample/sec.