Dynamic power optimization of the trace-back process for the Viterbi algorithm

M Petrov; T Murgan; A Obeid; C Chitu; P Zipf; J Brakensiek; M Glesner; IEEE

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Dynamic power optimization of the trace-back process for the Viterbi algorithm

M Petrov, T Murgan, A Obeid, C Chitu, P Zipf, J Brakensiek, M Glesner and IEEE

2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 2, PROCEEDINGS, pp.721-724

01/01/2004

Abstract

Computer Science

Computer Science, Artificial Intelligence

Engineering

Engineering, Electrical & Electronic

Science & Technology

Technology

This paper presents an architecture for the trace-back unit of a Viterbi decoder, whose decoding window length can be adjusted dynamically during runtime, allowing power to be saved by turning off the unused stages. Power savings of up to 62% are reported, using two different technology libraries to validate the results. An algorithm is also provided, which determines the optimum value for the trace-back window length that ensures a target BER of the decoded stream, for an estimated quality of the communication channel.

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Title: Dynamic power optimization of the trace-back process for the Viterbi algorithm
Creators - without role: M Petrov
T Murgan
A Obeid
C Chitu
P Zipf
J Brakensiek
M Glesner
IEEE
Publication Details: 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 2, PROCEEDINGS, pp.721-724
Publisher: IEEE
Number of pages: 4
Identifiers: 9918767508331
Academic Unit: King Abdulaziz City for Science & Technology
Language: English
Resource Type: Conference proceeding