Abstract
Conference Title: 2014 IEEE/ACS 11th International Conference on Computer Systems and Applications (AICCSA) Conference Start Date: 2014, Nov. 10 Conference End Date: 2014, Nov. 13 Conference Location: Doha, Qatar H.264/AVC video coding standard has achieved a significant improvement in coding efficiency over previous standards, such as, H.261, H.263 and MPEG-4, at the cost of computational complexity. This paper takes advantage of the macroblock (MB) level parallelism in H.264/AVC encoder and based upon this represents a scheme to implement the encoder for multi-core platform. According to this technique an encoding process of an MB is divided into several independent phases and each phase is executed on a separate processing core. Moreover to efficiently utilize the multi-core processors and to improve the encoder performance, the encoder is pipelined at MB level. The experimental results show that encoding rate of pipelined encoder as compare to sequential encoder is improved from 6 fps to 72 fps and from 2 fps to 32 fps for FD1 (720 × 480) and HD 720p (1280 × 720) resolutions, respectively. The implemented encoder can be used for multimedia applications like video conferencing, smart phones, high quality mobile digital video recorders, tablet computers, mobile digital TVs etc.