Abstract
A new design approach for hardware implementation of FIR filter structures for image processing is proposed. The suggested scheme combine Speculative Processing with Sub-Expression Sharing to produce low complexity filter structures. The Speculative Processing elements thus obtained make use of correlation among successive signal samples of images to predict the higher significant bits of the sample to be processed next in sequence. The predicted sample can then be processed next in sequence. The predicted sample can then be processed with less complexity hardware using sub-expression sharing techniques. For naturally occuring images and video frames, this speculation is mostly valid and accurate results are obtained even while computing accumulator outputs with lesser precision hardware. This work investigates several image processing scenarios where the proposed technique could result in substantial savings in hardware. Complete design of speculative sub-expression sharing based image filters has been implemented on Xilinx Virted FPGA.