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Gate first band edge high-k/metal stacks with EOT=0.74nm for 22nm node nFETs
Conference proceeding

Gate first band edge high-k/metal stacks with EOT=0.74nm for 22nm node nFETs

J. Huang, P. D. Kirsch, M. Hussain, D. Heh, P. Sivasubramani, C. Young, D. C. Gilmer, C. S. Park, Y. N. Tan, C. Park, …
2008 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATIONS (VLSI-TSA), PROCEEDINGS OF TECHNICAL PROGRAM, pp.152-153
01/01/2008
DOI: https://doi.org/10.1109/VTSA.2008.4530842

Abstract

Engineering Engineering, Electrical & Electronic Science & Technology Technology
We demonstrate for the first time a gate first high-k/metal gate (MG) nFET with EOT=0.74nm (T-inv=1.15mn), low V-t =0.30V, high performance [I-on/I-off=1310(mu A/um) at 100(nA/um)], low leakage (> 200x reduction vs. SiO2/PolySi) and good PBTI. Low-k interface layer scaling and high-k La-doping enable this desirable EOT and V-t. SiON/HfLaSiON can give similar interface quality as SiO2/HfSiON. Device performance was further improved 5% by strain engineering.

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