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Gate first high-k/metal gate stacks with zero SiOx interface achieving EOT=0.59nm for 16nm application
Conference proceeding

Gate first high-k/metal gate stacks with zero SiOx interface achieving EOT=0.59nm for 16nm application

J. Huang, D. Heh, P. Sivasubramani, P.D. Kirsch, G. Bersuker, D.C. Gilmer, M.A. Quevedo-Lopez, M.M. Hussain, P. Majhi, P. Lysaght, …
2009 Symposium on VLSI Technology, pp.34-35
06/2009

Abstract

Annealing Bismuth CMOS technology Hafnium oxide High K dielectric materials High-K gate dielectrics Jamming Oxidation Scalability Temperature

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