Abstract
A scheme for time and power efficient embedded system design using hardware and software components, is presented. Our objective is to reduce the execution time and the power consumed by the system, leading to the simultaneous multi-objective minimization of time and power. This task of suitably partitioning the system into hardware and software components is achieved using Genetic Algorithms (GA). An enhanced task scheduling algorithm is proposed. To emulate the characteristics of practical systems, the influence of interprocessor communication is examined. The suitability of introducing a reconfigurable hardware resource is experimented for the same objectives. A test environment is developed to perform exhaustive tests on these set objectives. Multiple tests were conducted to confirm the consistency of GA.