- Title
- HW/SW FPGA Implementation of Vector Median Filter
- Creators - without role
- A. Boudabous - Laboratory of Electronics and Information Technology, Sfax, TunisiaAhmed Ben Atitallah - University of BordeauxPatrice Kadionik - University of BordeauxL. Khriji - Sultan Qaboos UniversityNouri Masmoudi - Laboratory of Electronics and Information Technology, Sfax, TunisiaIEEE
- Publication Details
- Proc. of PRIME: IEEE Conference on Ph.D. Research in Microelectronics and Electronics, pp.101-104
- Conference
- PRIME: IEEE Conference on Ph.D. Research in Microelectronics and Electronics
- Identifiers
- 9912802308331
- Academic Unit
- Al Jouf University
- Language
- English
- Resource Type
- Conference proceeding
Conference proceeding
HW/SW FPGA Implementation of Vector Median Filter
Proc. of PRIME: IEEE Conference on Ph.D. Research in Microelectronics and Electronics, pp.101-104
PRIME: IEEE Conference on Ph.D. Research in Microelectronics and Electronics
02/07/2007
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