Interpolation based direct digital frequency synthesis for wireless communications

A.M. Eltawil; B. Daneshrad; IEEE

doi:10.1109/WCNC.2002.993466

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Conference proceeding

Interpolation based direct digital frequency synthesis for wireless communications

A.M. Eltawil, B. Daneshrad and IEEE

2002 IEEE Wireless Communications and Networking Conference Record. WCNC 2002 (Cat. No.02TH8609), Vol.1, pp.73-77 vol.1

2002

DOI: https://doi.org/10.1109/WCNC.2002.993466

Abstract

Clocks

Communication system control

Computer architecture

Frequency synthesizers

Hardware

Interpolation

Read only memory

Table lookup

Tuning

Wireless communication

In this paper, a compact architecture for direct digital frequency synthesis (DDFS) is presented. It uses a smaller lookup table for sine and cosine functions compared to existing architectures, with minimal hardware overhead. The computation of the sinusoidal values is performed by a parabolic interpolation structure, thus only interpolation coefficients need to be stored in the read-only memory (ROM). A DDFS with 64 dBc SFDR, 10-bit output resolution and 32 bit phase accumulator requires only 104 bits of ROM storage. The ROM size is consistently less than 1 Kbits for SFDR up to 85 dBc.

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Details

Title: Interpolation based direct digital frequency synthesis for wireless communications
Creators - without role: A.M. Eltawil - Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
B. Daneshrad - Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
IEEE
Publication Details: 2002 IEEE Wireless Communications and Networking Conference Record. WCNC 2002 (Cat. No.02TH8609), Vol.1, pp.73-77 vol.1
Publisher: IEEE
Identifiers: 9944300108331
Academic Unit: King Abdullah University of Science & Technology
Language: English
Resource Type: Conference proceeding