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MOS memory with double-layer high-[kappa] tunnel oxide Al2O3/HfO2 and ZnO charge trapping layer
Conference proceeding

MOS memory with double-layer high-[kappa] tunnel oxide Al2O3/HfO2 and ZnO charge trapping layer

Nazek El-Atab, Ammar Nayfeh, Berk Berkan Turgut and Ali K Okyay
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Conference Proceedings, p.766
01/07/2015

Abstract

  Conference Title: 2015 IEEE 15th International Conference on Nanotechnology (IEEE-NANO) Conference Start Date: 2015, July 27 Conference End Date: 2015, July 30 Conference Location: Rome, Italy 10 years) which make them promising for applications in non-volatile memory devices. Moreover, the results highlight that tunnel band engineering can be used to further reduce the operating voltage and equivalent oxide thickness of future memory devices without sacrificing the memory performance.

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