Memristive Non-Idealities: Is there any Practical Implications for Designing Neural Network Chips?

Olga Krestinskaya; Aidana Irmanova; Alex Pappachen James; IEEE

doi:10.1109/ISCAS.2019.8702245

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Memristive Non-Idealities: Is there any Practical Implications for Designing Neural Network Chips?

Olga Krestinskaya, Aidana Irmanova, Alex Pappachen James and IEEE

2019 IEEE International Symposium on Circuits and Systems (ISCAS), Vol.2019-, pp.1-5

05/2019

DOI: https://doi.org/10.1109/ISCAS.2019.8702245

Abstract

Computer architecture

Leakage currents

Learning Architectures

Memristive Crossbar

Memristor

Memristors

Performance evaluation

Resistance

Switches

System-on-chip

Variability

The impact of device-to-device, cycle-to-cycle, and parasitic variations in memristor devices on the performance of neural network architectures is not a fully understood topic. In this paper, we present an explicit analysis of memristor variabilities and non-idealities of memristive crossbar based learning architectures. The measurements of real devices and their effects on dot product operation in a memristive crossbar is reported. The effect of these non-idealities, limited resistive levels and variabilities on the performance and reliability of two-layer Artificial Neural Network (ANN), Convolutional Neural Network (CNN) and Binary Neural Network (BNN) is analyzed and presented.

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Details

Title: Memristive Non-Idealities: Is there any Practical Implications for Designing Neural Network Chips?
Creators - without role: Olga Krestinskaya - Nazarbayev University
Aidana Irmanova - Nazarbayev University
Alex Pappachen James - Nazarbayev University
IEEE
Publication Details: 2019 IEEE International Symposium on Circuits and Systems (ISCAS), Vol.2019-, pp.1-5
Publisher: IEEE
Identifiers: 9944946108331
Academic Unit: King Abdullah University of Science & Technology
Language: English
Resource Type: Conference proceeding