New high radix maximally-redundant signed digit adder

M.C. Mekhallalati; M.K. Ibrahim; IEEE

doi:10.1109/ISCAS.1999.777914

Back

Conference proceeding

New high radix maximally-redundant signed digit adder

M.C. Mekhallalati, M.K. Ibrahim and IEEE

1999 IEEE International Symposium on Circuits and Systems (ISCAS), Vol.1, pp.459-462 vol.1

1999

DOI: https://doi.org/10.1109/ISCAS.1999.777914

Abstract

Adders

Logic

Systems engineering and theory

In this contribution, a new architecture for a signed digit numbers adder is presented. The new adder works for signed digit numbers with maximum redundancy. In the new adder, the value of the carry to the next digit can be obtained with a simple logic circuit rather than having to perform an addition and a comparison as in the conventional signed digit adder. When compared to the conventional signed digit adder, the new maximum redundancy signed digit adder is three times faster and requires approximately 50% less area.

Metrics

1 Record Views

Details

Title: New high radix maximally-redundant signed digit adder
Creators - without role: M.C. Mekhallalati - University of Derby
M.K. Ibrahim
IEEE
Publication Details: 1999 IEEE International Symposium on Circuits and Systems (ISCAS), Vol.1, pp.459-462 vol.1
Publisher: IEEE
Identifiers: 9951942808331
Academic Unit: King Saud University
Language: English
Resource Type: Conference proceeding