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Polysilicon Thin Film Transistor : a Study of some Techniques of Realisation of the Channel Region and of the Gate
Conference proceeding

Polysilicon Thin Film Transistor : a Study of some Techniques of Realisation of the Channel Region and of the Gate

E. Scheid, E. Campo, J. J. Pedroviejo, S. Naimi, G. Sarrabayrouse and D. Bielle-Daspet
ESSDERC '93: 23rd European solid State Device Research Conference, pp.57-60
09/1993

Abstract

Amorphous materials Crystallization Electron mobility Insulation Oxidation Rapid thermal annealing Semiconductor films Silicon Temperature Thin film transistors
In this work, we show how some combinations of original processes for TFTs elaboration can result in interesting electrical characteristics. The temperature dependence of the field effect mobility shows that both oxidation and Rapid Thermal Annealing (at 750°C) may have detrimental and favourable effects on μη, and that the combination with Low Temperature Annealing (at 600°C) leads to the best values of both the mobility and the threshold voltage.

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