Abstract
Conference Title: 2017 First International Conference on Latest trends in Electrical Engineering and Computing Technologies (INTELLECT) Conference Start Date: 2017, Nov. 15 Conference End Date: 2017, Nov. 16 Conference Location: Karachi, Pakistan A PVT tolerant precision current reference generator is presented using an all-PMOS approach in which all the MOSFETs are biased in their strong inversion regions. This approach takes full advantage of accurate SPICE simulation unlike the conventional approaches which employ MOSFETs in weak-inversion and therefore suffer from post-silicon mismatches. The design employs a power-efficient differential source-follower core to enhance the characteristics of a PTAT current from the bandgap core. The enhanced PTAT voltage is then counter-balanced by a CTAT current-source therefore achieving a reduced temperature coefficient. The current reference achieves a spread of ±3% in its nominal current value across the complete PVT variations corner cases. The complete design consumes a total current of 105uA from a 3.3V power supply. i.e. 347uW of power consumption. A supporting theoretical framework is also presented to elaborate the overall behavior of the circuit.