Abstract
Conference Title: 2018 IEEE Applied Power Electronics Conference and Exposition (APEC) Conference Start Date: 2018, March 4 Conference End Date: 2018, March 8 Conference Location: San Antonio, TX, USA Modular Multilevel Converters is developing a realistic alternative to the conventional converters for Medium Voltage (MV) and High Voltage Direct Current (HVDC) applications. The MMC topologies utilize a high number of submodule (SM) cascaded in series per phase arm to achieve the desired high voltage level. These SMs can be as high as 512 SMs to produce a very low Total Harmonics Distortion (THD) (e.g. < 0.1%) of the MMC AC side interface voltage. However, employing a large number of SMs in the converter to synthesize a very low THD of an AC voltage with a high number of levels increases the control complexity. Typically, the MMC AC side interface voltage THD requirements are < 3% which can be achieved by 48-pulse stepped AC waveform. This paper presents the first step towards MMC scale-up control and performance analysis such that the behavior of a high number of SMs can be predicted by a cumulative set of a smaller number of SMs. A Back-to-Back (B2B) MMC based on the scale-up method is implemented in a Real Time Digital Simulator (RTDS) and MMC support units based FPGAs. The results demonstrate that the scale-up control method is providing a satisfactory performance and other features for HVDC systems such as a stable operation under multiple faulty SMs.