Abstract
Conference Title: 2016 11th International Design & Test Symposium (IDT) Conference Start Date: 2016, Dec. 18 Conference End Date: 2016, Dec. 20 Conference Location: Hammamet, Tunisia Complex image processing algorithms (e.g. Sobel edge detection) combined with higher resolution video streaming, are so computationally and put bigger demands on processing power. Unlike the software solutions, parallel solutions satisfy well these algorithms' performance, but using a programmable logic such as FPGA's can provide us more. Driven by the rapid technological advances, today it's possible to combine a high-speed CPU and an FPGA technology on a single system on Chip (SoC), such as the Xilinx Zynq 7000 series. In this paper, we present a HD video streaming architecture and a Sobel edge detection IP core design and implementation using a high-level synthesis workflow. A HD video with a 1080p resolution streamed from a laptop HDMI interface. The processed videos were displayed by the use of a monitor. For implementation, we used a Digilent ZYBO Zynq ZC7010 based platform and our experimental results will be compared with an NVIDIA M840 GPU.