Abstract
Conference Title: 2018 76th Device Research Conference (DRC) Conference Start Date: 2018, June 24 Conference End Date: 2018, June 27 Conference Location: Santa Barbara, CA, USA Negative-capacitance field-effect transistors (NC-FETs) or ferroelectric field-effect transistors (Fe-FETs), realized by replacing high-k dielectric in metal-oxide-semiconductor field-effect transistors (MOSFETs) with a ferroelectric insulator, have been extensively studied recently for potential digital logic or non-volatile memory applications. Steep-slope NC-FETs have attracted a lot of attention to break the Boltzmann limit of subthreshold swing (SS) in a MOSFET. Hysteresis-free sub-60 mV/dec NC-FETs at room temperature have been demonstrated very recently by static DC measurements1-3. However, one of the major concerns in NC-FETs is its operating speed, which might be limited by the slow polarization reversal in ferroelectric films due to heavy atom re-positioning4,5. A Fe-FET is a proper structure to study the ferroelectric switching speed due to the very pronounced counterclockwise hysteresis loop in its transfer curve, and it is used as a detector to measure the switch speed of the ferroelectric gate.