Abstract
In this paper, we propose and analyze a single buried gate power MOSFET structure. The structure uses single gate buried under the source and channel region with its dimensions opti-mized to get the best Ron-BV tradeoff. The device exhibits a good scaling property without perfor-mance degradation, which our previous structure of dual buried gates power MOSFET lacks because of the coupling effect of the two gates. The performance of the dual gates device depends largely on the length of the gates as well as on the separation between them. A performance degra-dation is observed while scaling it, in order to reduce its specific ON resistance. The proposed single gate device eliminates the coupling effect of the two gates allowing a better scaling of the device together with decreased process sensitivity. The scaling reduces the active area of the proposed device, resulting in the lowering of its specific ON resistance, without any significant change in its breakdown voltage. The reduced gate coupling also allows a high drift doping which further reduces the on resistance. The simulation results using TCAD device simulator shows that the pro-posed device possess a specific ON resistance of 25.31mohm.mm2 at a breakdown voltage of 68 V, resulting in a Baliga's Figure-of-merit (FOM1) of 17.99 MW/cm2, which is highest among the other reported non RESURF devices in the literature. This is achieved in parallel with the reduced gate charge resulting in a good reduction in its other figure of merit, FOM2 (RspxQsp).(c) 2022 THE AUTHORS. Published by Elsevier BV on behalf of Faculty of Engineering, Alexandria University. This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/ licenses/by-nc-nd/4.0/).