Abstract
Context: Because of the evergrowing complexity of Real-Time Embedded Systems (RTES) coupled with the variety of scheduling approaches and algorithms, the scheduling step has become more challenging mainly for new designers. In particular, the choice of the appropriate scheduling algorithm for a RTES is a hard step that requires vast knowledge and expertise of the scheduling field. Therefore, there is still a need for directives and guidelines to assist designers while choosing the appropriate scheduling algorithm to avoid system failures. In this respect, some approaches were proposed to deal with automatic scheduling. However, only the partitioned scheduling approach which prevents task migration was supported.
Objective: Our work aims at supporting the automatic choice of scheduling approach and algorithm at a high-level of abstraction. A key feature of this proposal is that it supports semi-partitioned and global scheduling, which allow task migration.
Method: With the above objective in mind, we propose a model-based approach which focuses on the use of the Model Driven Engineering (MDE) and design patterns to support the automatic scheduling at a high-level of abstraction. The proposed approach uses two design patterns previously published (Magdich et al., 2014, 2015) to model the semi-partitioned and global scheduling approaches. They allow checking the correctness of the studied system model and detecting automatically the appropriate scheduling approach and algorithm. A schedulability analysis step is, therefore, performed to check the temporal behavior of the studied system once the selected scheduling algorithm is applied.
Results: The findings reveal the important impact of the use of high-level methodologies during the RTES scheduling. The automatic choice of the scheduling algorithm makes the scheduling step easier.
Conclusions: Our proposal represents the first attempt to support the automatic scheduling regarding semi-partitioned and global scheduling. Thanks to the use of high-level techniques during the RTES design and scheduling, the designer’s effort is reduced.