Abstract
Quantum-dot Cellular Automata (QCA) is pioneer nanotechnology that has been gained attention in the research community for proposing low power, low area, and highly efficient digital circuits in next-generation computer designs. Memory is utilized as one of the primary parts in different circuits design, hence the design and optimization of random access memory (RAM) cells have become one of the most attractive research areas in QCA technology. In this paper, a new D-latch-based nano-scale RAM cell is proposed which is suitable for the implementation of efficient single-layer QCA-based circuits. In addition, by employing this memory cell, 1×4 RAM is also presented. These circuits are designed using QCADesigner and functional correctness of simulation results is also proved. According to the collected results, the introduced nano-scale structure involves low latency and a small number of cells in contrast to its previous counterparts.