Abstract
In this work, we propose and simulate a novel structure of a double gate metal source/ drain (MSD) Schottky MOSFET. The novelty of the proposed device is that it realizes a complete CMOS inverter action, which is actually being realized by the combination of two n and p type MOS transistors in the conventional CMOS technology. Therefore, the use of this device will significantly reduce the transistor count in implementing combinational and sequential circuits. Further, there is a significant reduction in the number of junctions and regions in the proposed device in comparison to the conventional CMOS inverter. Therefore, the proposed device is compact and can consume less power. The proposed device has been named as Sajad-Sunil-Schottky (SSS) device. The mixed mode circuit analysis of the proposed SSS device has shown that a CMOS inverter action with high logic level (V-OH) and low logic level (V-OL) as similar to VDD and similar to ground respectively. A two dimensional calibrated simulation study using the experimental data has revealed that the proposed SSS device in n and p type modes have subthreshold slopes (S) of 130 mV/decade and 85 mV/decade respectively and have reasonable high ION and I-ON/I-OFF ratio's. Furthermore, it has been proved that such a device action cannot be realised by folding the conventional doped n and p MOS transistors. (C) 2015 Elsevier Ltd. All rights reserved.