A time-multiplexed reconfigurable neuroprocessor

Journal article

Peer reviewed

Fadi Sibai and Sunil Kulkarni

IEEE MICRO, Vol.17(1), pp.58-65

01/01/1997

Abstract

Neural networks

Semiconductors

VLSI

A multi-layered pulse stream neuroprocessor design uses a mixed analog-digital implementation for efficient chip area use and operating speed.

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Title: A time-multiplexed reconfigurable neuroprocessor
Creators - without role: Fadi Sibai - Intel
Sunil Kulkarni
Publication Details: IEEE MICRO, Vol.17(1), pp.58-65
Publisher: The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Identifiers: 9925066908331
Academic Unit: Prince Mohammad Bin Fahd University
Language: English
Resource Type: Journal article