Applying the handel-C design flow in designing an HMAC-hash unit on FPGAs

Journal article

E Khan, M WATHEQ EI-KHARASHI, F Gebali and M ABD-EI-BARR

IEE proceedings. Computers and digital techniques, Vol.153(5), pp.323-334

01/09/2006

Abstract

Applied sciences

Circuit properties

Digital circuits

Electric, optical and optoelectronic circuits

Electronic circuits

Electronics

Exact sciences and technology

1 Record Views

Title: Applying the handel-C design flow in designing an HMAC-hash unit on FPGAs
Creators - without role: E Khan - University of Victoria
M WATHEQ EI-KHARASHI - University of Victoria
F Gebali - University of Victoria
M ABD-EI-BARR - University of Victoria
Publication Details: IEE proceedings. Computers and digital techniques, Vol.153(5), pp.323-334
Publisher: Institution of Electrical Engineers
Identifiers: 9930411908331
Academic Unit: Umm Al Qura University
Language: English
Resource Type: Journal article