Abstract
Next generation planar and non-planar complementary metal oxide semiconductor (CMOS) structures are three-dimensional nanostructures with multi-layer stacks that can contain films thinner than ten atomic layers. The high resolution of transmission electron microscopy (TEM) is typically chosen for studying properties of these stacks such as film thickness, interface and interfacial roughness. However, TEM sample preparation is time-consuming and destructive, and TEM analysis is expensive and can provide problematic results for surface and interface roughness. Therefore, in this paper, we present the use of direct measurements of sidewall surface structures by conventional atomic force microscopy (AFM) as an alternative or complementary method for studying multi-layer film stacks and as the preferred method for studying FinFET sidewall surface roughness. In addition to these semiconductor device applications, this AFM sidewall measurement technique could be used for other three-dimensional nanostructures.