Abstract
Ferroelectric tunnel junctions (FTJs) are ideal resistance-switching devices due to their deterministic behavior and operation at low voltages. However, FTJs have remained mostly as a scientific curiosity due to three critical issues: lack of rectification in their current-voltage characteristic, small tunneling electroresistance (TER) effect, and absence of a straightforward lithography-based device fabrication method that would allow for their mass production. Co-planar FTJs that are fabricated using wafer-scale adhesion lithography technique are demonstrated, and a bi-stable rectifying behavior with colossal TER approaching 10(6)% at room temperature is exhibited. The FTJs are based on poly(vinylidenefluoride-co-trifluoroethylene) [P(VDF-TrFE)], and employ asymmetric co-planar metallic electrodes separated by <20 nm. The tunneling nature of the charge transport is corroborated using Simmons direct tunneling model. The present work is the first demonstration of functional FTJs manufactured via a scalable lithography-based nano-patterning technique and could pave the way to new and exciting memory device concepts.