Abstract
Modular exponentiation is an exponentiation performed over a modulus. It is useful in computer science, especially in the field of public-key cryptography. Most technological applications of modular arithmetic involve exponentials with very large numbers. In this paper, we propose a high radix reconfigurable implementation for the Right-to-Left Modular Exponentiation with NAF-Representation by exploiting the maximum possible parallelism of the internal operations. The proposed design targeted the ALTERA Cyclone IV FPGA (EP4CGX22CF19C7) along with Quartus II simulation package. The proposed design was evaluated in terms of the maximum operational frequency, the total path delay, the total design area and the total thermal power dissipation. The synthesized results revealed that the proposed high radix architecture implementation has recorded: critical path delay of 25.5 ns, maximum operational frequency of 44.59 MHz, hardware design area (number of logic elements) of 2556 LEs, and total thermal power dissipation estimated as 221.82 mW. Consequently, the proposed modular exponentiation architecture can be efficiently employed by many public key cryptographic mechanisms.