Abstract
In this paper, we propose a design and implementation of a Direct Memory Access Controller (DMAC) as a part of an SoC. The main purpose of the DMAC design is to integrate it into a System on a Chip (SoC) for the exchange of a large volume of data between the memory and peripherals at high speed. The proposed DMAC works on Advanced Microcontroller Bus Architecture (AMBA) specifications. Internally, these specifications define two buses, Advanced High-performance Bus (AHB) and Advanced Peripheral Bus (APB). The Direct Memory Access (DMA) controller functions as the bridge between AHB and APB and allows them to work in parallel. It works either in buffer or non-buffer data transfer mode, according to the peripheral speed. This is synchronized with an asynchronous FIFO. Fast data reads can be achieved by using an AMBA based DMA controller with a processor in the SoC. This means that the DMAC provides a high volume of data transfer. Hence, the proposed DMAC is a better option for high volumes of data, as well as for timing. It can be concluded that if using this AMBA-based DMA controller the issues of high speed and high volume data have been resolved. Comparison is made with ARM processors, such as Cortex A8 and ZC702, and design comparison with Xilinx DMA is also made. The DMAC is viewed as a more appropriate choice.