Abstract
The effect of rapid thermal annealing on the electrical properties of p(++)GaP/p(-)GaAsPN/n(+)GaP diodes were investigated by using current-voltage (I-V), capacitance-voltage (C-V) and deep level transient spectroscopy (DLTS) techniques in the temperature range from 100 K to 440 K. It was observed that rapid thermal annealing treatment improves the electrical characteristics of as-grown structures. The annealed samples showed an ideality factor lower than the as-grown samples for all temperatures. The ideality factor values from I-V characteristics has changed between 6.8 and 1.9 in the temperature range of 110-430 K for as grown diode, and between 6.3 and 1.44 in the temperature range 100-400 K for the annealed diode. On the other hand, the barrier height increases and the ideality factor decreases with increasing temperature for all samples. The barrier height values has changed between 0.29 eV and 0.71 eV in the temperature range of 190-430 K for as grown diode, and between 0.38 eV and 0.77 eV in the temperature range 180-420 K for the annealed diode. High values of barrier heights were observed in the annealed samples due to the barrier height in-homogeneities at the p-i-n junction. The net acceptor concentration was calculated to be 1.18 x 10(18) cm(-3) and 2.11 x 10(18) cm(-3) for the as-grown and annealed GaAsPN layers, respectively. The net acceptor concentration increases by similar to 56% and the leakage current of the GaAsPN/GaP p-i-n junction decreases by 1-2 orders after RTA. DLTS and Laplace-DLTS measurements reveal three hole traps, H1(an)(0.06 eV), H2(an)(0.065 eV) and H3(0.23 eV) in the annealed samples as compared with two hole traps, H4(ag)(0.07 eV) and H5(0.25 eV) in the as-grown samples. After rapid thermal annealing an extra shallow trap is created.