Abstract
Fractional-order capacitors are the core building blocks for implementing fractional-order circuits. Due to the absence of their commercial availability, they can be approximated through appropriately configured passive or active integer-order element topologies. Such a topology, constructed using Operational Transconductance Amplifiers (OTAs) and capacitors has been implemented in monolithic form through the AMS 0.35 mu m CMOS process, and the fabricated chips are employed here for the experimental evaluation of the behavior of networks constructed from fractional-order capacitors connected in series or in parallel. (C) 2017 Elsevier GmbH. All rights reserved.