Abstract
We report device and material considerations for the fabrication of high-mobility thin-film transistors (TFTs) compatible with large-area and inexpensive processes. In particular, this paper reports photolithographically defined n-type TFTs (n-TFTs) based on cadmium sulfide (CdS) films deposited using solution-based techniques. The integration process consists of four mask levels with a maximum processing temperature of 100 degrees C. The TFT performance was analyzed in terms of the CdS semiconductor thickness and as a function of postdeposition annealing in a reducing ambient. The I-on/I-off ratios are similar to 10(7) with field-effect mobilities of similar to 5.3 and similar to 4.7 cm(2)/V . s for Al and Au source-drain contacts, respectively, using 70 nm of CdS. Transmission electron microscopy and electron energy loss spectroscopy were used to analyze the CdS-metal interfaces.