Sign in
High-Current-Density Vertical-Tunneling Transistors from Graphene/Highly Doped Silicon Heterostructures
Journal article   Peer reviewed

High-Current-Density Vertical-Tunneling Transistors from Graphene/Highly Doped Silicon Heterostructures

Yuan Liu, Jiming Sheng, Hao Wu, Qiyuan He, Hung-Chieh Cheng, Muhammad Imran Shakir, Yu Huang and Xiangfeng Duan
Advanced materials (Weinheim), Vol.28(21), pp.4120-4125
01/06/2016
PMID: 27038143

Abstract

Chemistry Chemistry, Multidisciplinary Chemistry, Physical Materials Science Materials Science, Multidisciplinary Nanoscience & Nanotechnology Physical Sciences Physics Physics, Applied Physics, Condensed Matter Science & Technology Science & Technology - Other Topics Technology
Scalable fabrication of vertical-tunneling transistors is presented based on heterostructures formed between graphene, highly doped silicon, and its native oxide. Benefiting from the large density of states of highly doped silicon, the tunneling transistors can deliver a current density over 20 A cm(-2). This study demonstrates that the interfacial native oxide plays a crucial role in governing the carrier transport in graphene-silicon heterostructures.

Metrics

1 Record Views

Details