High-performance, low-power architecture for scalable radix 2 montgomery modular multiplication algorithm/Architecture haute performance et de faible puissance pour un algorithme de multiplication modulaire de réduction montgomery radix 2

Journal article

Peer reviewed

Atef Ibrahim, Fayez Gebali, Hamed El-Simary and Amin Nassar

Canadian journal of electrical and computer engineering, Vol.34(4), p.152

01/10/2009

Abstract

Algorithms

Cryptography

1 Record Views

Title: High-performance, low-power architecture for scalable radix 2 montgomery modular multiplication algorithm/Architecture haute performance et de faible puissance pour un algorithme de multiplication modulaire de réduction montgomery radix 2
Creators - without role: Atef Ibrahim
Fayez Gebali
Hamed El-Simary
Amin Nassar
Publication Details: Canadian journal of electrical and computer engineering, Vol.34(4), p.152
Publisher: The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Identifiers: 9926011708331
Academic Unit: Prince Sattam Bin Abdulaziz University
Language: English
Resource Type: Journal article