Abstract
This paper presents an innovative reliability bench specifically dedicated to high RF power device lifetime tests under pulse conditions for radar application. A base-station dedicated LDMOS transistor has been chosen for RF lifetests and a complete device electric characterization has been performed. A whole review of its critical electrical parameters after accelerated ageing tests is proposed and discussed. This study tend to explain the physical degradation mechanisms occurred during RF life-tests by means of 2D ATLAS-SILVACO simulations. Finally, the paper demonstrates that N-LDMOS degradation is linked to hot carriers generated interface states (traps) and trapped electrons, which results in a build up of negative charge at Si/SiO2 interface. More interface states are created at low temperature due to a located maximum impact ionization rate at the gate edge.