Abstract
In this article, we investigate a variant of the line-tunnel FET employing dual MOS-capacitor (MOSCAP) extensions incorporating field-induced quantum confinement (FIQC). Unlike Gate-over-Source (GoSo) TFET having an all-lateral design, dual-MOS (D-MOS) TFET has raised channel/drain regions exhibiting better electrostatics at the 2-D source boundary. At similar dimensions, 2-D-calibrated simulations reveal that under No-FIQC condition, D-MOS exhibits 2.1× better ION along with much improved parasitic leakageintheOFF-state(V GS = 0 V, V DS = 1 V). Energyquantization due to FIQC in the conduction band (CB) near the gate dielectric is captured along with the reshaped carrier density distribution. The delay in the onset of vertical bandto-band tunneling (BTBT), Δ V BTBT shift, and deterioration in I ON are also calculated. We later observe that the use of a dual-metal-gate (DMG) and an unequal lateral/vertical oxide thickness as structural improvements further eliminates the parasitic leakage. In addition, with the gate-drain underlap (L GD ) up to 10 nm, a reduction in intrinsic delay is also observed.