Abstract
This paper describes models for three different plasma processing techniques that are commonly used in the microelectronics industry. Specifically, we present models for simulation of topography evolution during plasma enhanced chemical vapor deposition (PECVD), ionized physical vapor deposition (IPVD), and reactive ion etching (RIE). Such models can assist in developing process understanding and are very useful in engineering studies that seek to optimize process performance. As an example of such a study we present the application of the RIE model to the problem of aspect-ratio-dependent etching (ARDE).