Abstract
We present here the preliminary growth and characterization results on the integration of GaAs/GaNAsSb/GaAs III-V layer structure on Gelgraded-SiGe/Si substrate or simply silicon virtual substrate (SVS). It was found in cross-section transmission electron microscopy (TEM) Study that a suboptimal Ge surface annealing (below 600 degrees C) was detrimental to the subsequent growth of Ill-V layer, and surface pitting was observed on the GaAs surface as a result. This surface pit was found to originate from the heterovalent interface between the Ge substrate surface and the GaAs epitaxy. By properly treating the Ge surface with in-situ annealing at 640 degrees C and low temperature GaAs seeding before epitaxy growth, the above Ill-V layer structure can be successfully grown with smooth surface morphology. The atomic force microcopy (AFM) results correlated well with the RHEED observation and provided further insight into the quality of three GaAs/GaNAsSb/GaAs samples. The root-mean-square (rms) surface roughness of the GaAs/GaNAsSb/GaAs layer structures with GaAs grown at 650, 610, and 580 degrees C were 25.9, 6.2, and 1.7 nm, respectively. In addition, upon annealing at similar to 750 degrees C for 1 min in N-2 ambient, one of the GaAs/GaNAsSb/GaAs sample showed a 5 K photoluminescence (PL) spectrum that was dominated by a peak with emission energy at 980 nm or equivalent to 1.27 eV. (C) 2008 Elsevier B.V. All rights reserved.