Abstract
The enhanced phase-locked loop (EPLL) is one of the most famous PLLs in single-phase applications and a versatile tool for different signal processing applications, especially for the grid synchronization of power converters. Recently, it has been proved that the EPLL has a quite narrow stable zone (compared to its unstable zone) in the positive parameter space from a small-signal point of view. This zone will be even more narrow if maintaining a minimum stability margin is required. This article aims to modify the EPLL structure to improve its stability margin, and at the same time, make it unconditionally stable in the positive parameter space from a small-signal point of view.