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Power management in the Amulet microprocessors
Journal article

Power management in the Amulet microprocessors

S B Furber, D W Lloyd, A Efthymiou, MJG Lewis, J D Garside and S Temple
IEEE design & test of computers, Vol.18(2), pp.42-52
01/03/2001
DOI: https://doi.org/10.1109/54.914617

Abstract

Computer Science Computer Science, Hardware & Architecture Engineering Engineering, Electrical & Electronic Science & Technology Technology
Amulet microprocessors are asynchronous (clockless) implementations of the ARM 32-bit RISC architecture. Their asynchronous control framework has positive benefits for low-power applications because it reduces activity to the minimum required to perform a task, whereas a clock inevitably incurs wasteful activity.

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