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Reduced Graphene Oxide Electrodes for Large Area Organic Electronics
Journal article   Peer reviewed

Reduced Graphene Oxide Electrodes for Large Area Organic Electronics

Paul H. Woebkenberg, Goki Eda, Dong-Seok Leem, John C. de Mello, Donal D. C. Bradley, Manish Chhowalla and Thomas D. Anthopoulos
Advanced materials (Weinheim), Vol.23(13), pp.1558-1562
05/04/2011
DOI: https://doi.org/10.1002/adma.201004161
PMID: 21360779

Abstract

Chemistry Chemistry, Multidisciplinary Chemistry, Physical Materials Science Materials Science, Multidisciplinary Nanoscience & Nanotechnology Physical Sciences Physics Physics, Applied Physics, Condensed Matter Science & Technology Science & Technology - Other Topics Technology
Interlayer lithography is used to pattern highly conductive, solution-processed, reduced graphene oxide source and drain electrodes down to 10 mu m gaps. These patterned electrodes allow the fabrication of high-performance organic thin-film transistors and complementary circuits. The method offers a viable route towards organic electronics fabricated entirely by solution processing.

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